{"product_id":"sdr-1t8r-70mhz-6ghz-1tx8rx-sdr-development-board-4-ad9361-8-channel-phase-synchronous-reception","title":"SDR-1T8R 70MHz-6GHz 1TX8RX SDR Development Board 4×AD9361 8-Channel Phase Synchronous Reception","description":"\u003ch1\u003eSPECIFICATIONS\u003c\/h1\u003e\u003cp\u003e\u003cspan\u003eBrand Name\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eNONE\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eHigh-concerned chemical\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003enone\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eOrigin\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eMainland China\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eS\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003e101333\u003c\/span\u003e\u003c\/p\u003e\u003cdiv class=\"detailmodule_html\"\u003e\u003cdiv class=\"detail-desc-decorate-richtext\"\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-size:20px;font-weight:bold;color:rgb(74, 144, 226)\"\u003e \u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eDescription:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- The SDR-1T8R development board is a highly integrated software defined radio device based on ZYNQ FPGA and 2\/4 AD936X RF chips, designed specifically for multi-channel RF signal acquisition, processing, and analysis scenarios. The device implements a multi-channel architecture with 1 transmitter and 4\/8 receivers, supporting wideband signal processing from 70MHz to 6GHz. It ensures multi-channel consistency through high-precision phase synchronization technology at the FPGA end and is equipped with ARM bare machine programs and upper computer software to achieve high-speed data transmission, real-time waveform display, flexible trigger control, and other functions.\u003cbr\u003e - This product is suitable for fields such as incoming wave direction detection, signal acquisition, wireless monitoring, radar research and development, communication testing, etc.\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eFeatures:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- The firmware implements 8-channel phase synchronization to meet the requirements of phase synchronization for multiple receiving channels in applications.\u003cbr\u003e - Full frequency coverage from 70MHz to 6GHz.\u003cbr\u003e - 0~76dB gain continuously adjustable.\u003cbr\u003e - Default 20M sampling rate, supports customization.\u003cbr\u003e - 1000M Ethernet data transmission.\u003cbr\u003e - Using DDR3 cache and flexible triggering methods, it can continuously collect IQ waveform data up to 16M points.\u003cbr\u003e - Compact size, lightweight design, suitable for size limited scenarios.\u003cbr\u003e - Type-C interface integrates JTAG, PS UART, and power supply functions.\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eCore Parameters:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Master chip: XC7Z020-2CLG400I, featuring 85K logic units, 106400 registers, 220 DSP48E1 multipliers, 2.1Mb block RAM, and 4 on-chip PLLs; Integrated ARM Cortex-A9 dual core, with a maximum clock speed of 866MHz, and 32 KB L1 cache and 512 KB L2 cache.\u003cbr\u003e - RF chip: AD9361\u003cbr\u003e - Crystal oscillator: 0.1ppm OCXO\u003cbr\u003e - Triggering source: internal cycle triggering, adjustable cycle, level triggering, external triggering\u003cbr\u003e - Triggering method: single trigger, continuous trigger, delayed trigger, and multiple sampling at equal intervals after triggering\u003cbr\u003e - Trigger storage depth: 16M points\u003cbr\u003e - Storage depth before triggering: 4096 points\u003cbr\u003e - Trigger position: 0 - 4095\u003cbr\u003e - Phase synchronization accuracy: less than 1 degree, supports disabling phase calibration for easy verification of calibration effectiveness\u003cbr\u003e - Extra phase compensation: support additional phase compensation\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eRF Interface:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Receiving channel: 8-channel, IPEX interface, 50ohm impedance match\u003cbr\u003e - Transmitting channel: 1-channel, IPEX interface, 50ohm impedance match\u003cbr\u003e - Trigger input: 1-channel, IPEX interface (external trigger signal input)\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eRF Interface:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Receiving channel: 8-channel, IPEX interface, 50ohm impedance match\u003cbr\u003e - Transmitting channel: 1-channel, IPEX interface, 50ohm impedance match\u003cbr\u003e - Trigger input: 1-channel, IPEX interface (external trigger signal input)\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003ePower Supply Interface:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Power supply method: Type-C debugging port power supply; power supply through 2 reserved via holes\u003cbr\u003e - Power supply parameter: 5V DC (±5%), rated current of 2A\u003cbr\u003e - Power consumption specification: typical power consumption about 7W, maximum power consumption ≤10W\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eControl and Data Interface:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003ePS Terminal Interface:\u003cbr\u003e - High speed interface: 1-channel Gigabit Ethernet\u003cbr\u003e - 1G bytes 32bit DDR3\u003cbr\u003e - USB-OTG\u003cbr\u003e - SD card slot (support up to 32GB)\u003cbr\u003e - 32M QSPI Flash (used for storing programs and configuration files)\u003cbr\u003e \u003cbr\u003e PL Terminal Interface:\u003cbr\u003e - 16-Channel 3.3V GPIO (can be configured as input\/output for extended control)\u003cbr\u003e \u003cbr\u003e Debugging Interface:\u003cbr\u003e - Integrated into Type-C interface 1 (no additional JTAG interface required, FPGA and ARM joint debugging can be achieved through Type-C cable, while supporting power supply)\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eMechanical Dimension and Environment Adaptability:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Board size: 7 x 8cm\u003cbr\u003e - Net weight: \u0026lt; 100g\u003cbr\u003e - Working temperature: 0℃ to 60℃\u003cbr\u003e - Storage temperature: -40℃ to 85℃\u003cbr\u003e - Relative humidity: 10% to 90% (non-condensing)\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eRF Function:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Multi channel synchronization: FPGA side implements multi-channel receiving phase synchronization calibration, supports enabling\/disabling phase calibration mode.\u003cbr\u003e - Frequency tuning: Supports continuous tuning across the entire frequency range of 70 MHz to 6 GHz, with a step accuracy of 2Hz.\u003cbr\u003e - Reception gain adjustment: Supports continuous configuration of 0~76dB gain, with a step size of 1dB.\u003cbr\u003e - Self loop testing mode: Supports RF signal self loop testing, facilitating system self checking and debugging.\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eSignal Processing Function:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- For FPGA side processing: 8-channel synchronous acquisition, phase calibration, data caching, providing high-precision raw IQ data for applications.\u003cbr\u003e - For ARM side processing: Develop bare metal programs based on SDK to achieve data packaging and protocol parsing.\u003cbr\u003e - Data transmission: Multiple reception IQ data are transmitted through UDP protocol, and TCP protocol is used to achieve control command and status interaction.\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003eRF Performance:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- Receiving sensitivity: ≤-95dBm (1GHz, 10MHz bandwidth, SNR=10dB)\u003cbr\u003e - Dynamic range: ≥100dB (SFDR, 1GHz, middle gain)\u003cbr\u003e - Spurious suppression: ≥60dBc (deviation from carrier by more than 1MHz)\u003cbr\u003e - Consistency of 8 receiving channels: phase error ≤1° (full frequency band)\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_text\"\u003e \n \u003cp style=\"font-weight:bold\"\u003ePackage Included:\u003c\/p\u003e \n \u003cp style=\"font-size:16px\"\u003e- 1 x Development Board\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv class=\"detailmodule_image\"\u003e\n \u003cimg cke-id=\"img35\" class=\"detail-desc-decorate-image\" referrerpolicy=\"no-referrer\" slate-data-type=\"image\" src=\"https:\/\/ae-pic-a1.aliexpress-media.com\/kf\/S4251222f3ebb4674b100a7f7a62e245cy.jpg?width=1000\u0026amp;height=1000\u0026amp;hash=2000\"\u003e\n\u003c\/div\u003e\n\u003c\/div\u003e\u003c\/div\u003e\r\n","brand":"Yoeruyo","offers":[{"title":"70MHz-6GHz","offer_id":55376959701291,"sku":"14:771#70MHz-6GHz","price":8113.95,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1000\/5744\/8747\/files\/S9ad4ec9bcf2747ffb94bce4d440ae1ae4.webp?v=1788332412","url":"https:\/\/yoeruyo.com\/products\/sdr-1t8r-70mhz-6ghz-1tx8rx-sdr-development-board-4-ad9361-8-channel-phase-synchronous-reception","provider":"Yoeruyo","version":"1.0","type":"link"}