{"product_id":"zynq-7020-minimum-system-fpga-xilinx-smart-zynq-sl-original-xc7z020-clg484-development-board","title":"ZYNQ 7020 Minimum System FPGA XILINX ( Smart Zynq SL Original ) XC7Z020-CLG484 Development board","description":"\u003ch1\u003eSPECIFICATIONS\u003c\/h1\u003e\u003cp\u003e\u003cspan\u003eBrand\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eXILINX\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eBrand Name\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eNONE\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eChoice\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eyes\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eCondition\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eNew\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eExpansion Slot Type\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eGPIO\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eHigh-concerned chemical\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003enone\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eNetwork Interface Configuration\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eRJ45 Ethernet interface\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eOperating System Support\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eWindows\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eOptional accessories\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003e5 inch Capacitive touch IPS display 800X480 RGB interface\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eOrigin\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eMainland China\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003ePackage Type\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eFree transparent acrylic protective case\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eProcessor Architecture Type\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eARM+FPGA\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eType\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eModule\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eTypical application areas\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eFPGA Development Board\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eV1.3 Suspension of production\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eHardware version V1.3 (with pin headers, not soldered)\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eV1.3B Development Board\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eHardware version V1.3B (with pin headers, not soldered) adds a 40-pin RGB LCD screen cable interface\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003eVersion\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eV1.3B Development Board\u003c\/span\u003e\u003c\/p\u003e\u003cp\u003e\u003cspan\u003esemi_Choice\u003c\/span\u003e: \u003cspan style=\"color:#333\"\u003eyes\u003c\/span\u003e\u003c\/p\u003e\u003cdiv class=\"detailmodule_html\"\u003e\u003cdiv class=\"detail-desc-decorate-richtext\"\u003e\n\u003cdiv\u003e \u003c\/div\u003e\n\u003cdiv\u003eHardware version V1.3B (with pin headers, not soldered) adds a 40-pin RGB LCD screen cable interface\u003cbr\u003e\n\u003c\/div\u003e\n\u003cdiv\u003ehttps:\/\/ko.aliexpress.com\/item\/1005010651628580.html?gatewayAdapt=glo2kor\u003c\/div\u003e\n\u003cdiv\u003e\u003cbr\u003e\u003c\/div\u003e\n\u003cp\u003eUpdate Log:\u003c\/p\u003e\n\u003cp\u003eV1.3B, March 13, 2026\u003c\/p\u003e\n\u003cp\u003eAdjustments:\u003c\/p\u003e\n\u003cp\u003e1. On the basis of the V1.3 version, a 40-pin RGBLCD interface (in FPC connector form, compatible with the RGB screen of Point Zero Atom, including 35 FPGA IO ports) was added.\u003c\/p\u003e\n\u003cp\u003e2. The remaining size functions are exactly the same as the V1.3 version.\u003c\/p\u003e\n\u003cdiv\u003e\u003cbr\u003e\u003c\/div\u003e\n\u003cp\u003eV1.3 Version Description: October 2024\u003c\/p\u003e\n\u003cp\u003eReason for Adjustment: To make the row pins on both sides of the motherboard compatible with the external modules designed by our store in the future, this hardware has been slightly adjusted and updated.\u003c\/p\u003e\n\u003cp\u003e1. The power position of the row pins on one side was adjusted (as shown in the following block diagram) (V1.3 and V1.2 are consistent and mutually compatible, and no longer compatible with V1.1 version)\u003c\/p\u003e\n\u003cp\u003e2. The model of the TI power supply chip was adjusted (it was also a TI power supply chip before, and it had no impact on the usage)\u003c\/p\u003e\n\u003cp\u003e3. The CLK pin of HDMI when I is the SRCC clock pin was adjusted (can adapt to more third-party HDMI IP cores) (V1.3 changed from V1.2)\u003c\/p\u003e\n\u003cdiv\u003e\u003cbr\u003e\u003c\/div\u003e\n\u003cp\u003eThe version information can be found on the board label (near the POR button)\u003c\/p\u003e\n\u003cp\u003e\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/S5bfd2eb66bd74ecc9641a6c6053676b1g.jpg\" slate-data-type=\"image\"\u003e\u003c\/p\u003e\n\u003cdiv\u003e\u003cbr\u003e\u003c\/div\u003e\n\u003cp\u003eZYNQ 7020 Minimum System Development board\u003cbr\u003eBoard resources\u003cbr\u003e1. The main chip ZYNQ has been upgraded to 7020(new industrial-grade chip)\u003cbr\u003e2.512MB DDR3 (4Gbit)\u003cbr\u003e3. TF Card slot (responsible for TF boot)\u003cbr\u003e4. 128Mbit (16MB) QSPI FLASH (capable of booting)\u003cbr\u003e5. One EEPROM 2KB(PL)\u003cbr\u003e6. Two-channel LED lights (PL\u003cbr\u003e7. Two buttons (PL) + one button for resetting the control system POR\u003cbr\u003e8. One UART (PL) Type-C interface\u003cbr\u003e9. 68 GPIOs (all led out from the PL terminal) (34 groups) are all connected in pairs through differential lines, with equal lengths within the differential lines\u003cbr\u003e10. One side of the BANK is independently powered and the BANK voltage can be adjusted through a resistor\u003cbr\u003e11. Gigabit Ethernet (connected to the PL end)\u003cbr\u003e12.HDMI output interface\u003cbr\u003e13.PL is connected to a 50M active crystal oscillator\u003cbr\u003eBoth HDMI and USB are connected to ESD electrostatic protection devices\u003cbr\u003eIt does not come with a downloader. An external xilinx downloader is required\u003c\/p\u003e\n\u003cp\u003e\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/S2b175dffb6514e26964bf24e1d2be2499.jpg\" slate-data-type=\"image\"\u003e\u003c\/p\u003e\n\u003cp\u003e\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/Sb0f7d0f6cd3846c3921e486cabb3f44fP.jpg\" slate-data-type=\"image\"\u003e\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/S11f86ac9105448e08cf7e5073ee80ee7M.jpg\" slate-data-type=\"image\"\u003e\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/S967b4045454f4befa9add42f350ccbc3Z.jpg\" slate-data-type=\"image\"\u003eThe differences among the three boards: Smart Zynq SP2 (580), Smart Zynq SP (580), and Smart Zynq SL (380)\u003c\/p\u003e\n\u003cp\u003eSmart Zynq SP2: Built-in USB downloader and 1.3-inch 240x240 resolution screen\u003c\/p\u003e\n\u003cp\u003eSmart Zynq SP: Built-in USB downloader and 1.47-inch 320x172 resolution screen\u003c\/p\u003e\n\u003cp\u003eSmart Zynq SL: Requires an external downloader without USB and screen\u003c\/p\u003e\n\u003cp\u003eThe remaining circuits are exactly the same for all three\u003c\/p\u003e\n\u003cp\u003eThe JTAG interface is as follows. It can be compatible with most 10-pin Xilinux downloaders with a spacing of 2.54mm from our store or other stores\u003c\/p\u003e\n\u003cp\u003eNote: Some domestic downloader solutions may not be compatible with ZYNQ chips. Additionally, Altera's downloader is not universal\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/S89058fc5085240259d417244f0175bb6N.jpg\" slate-data-type=\"image\"\u003e\u003c\/p\u003e\n\u003cp\u003eHELLOFPGA also has a new model of ZYNQ motherboard, LemonZYNQ (LemonZynq can directly run the official image of PYNQ)\u003c\/p\u003e\n\u003cdiv class=\"detailmodule_html\"\u003e\u003cdiv class=\"detail-desc-decorate-richtext\"\u003e\u003cp\u003eHELLOFPGA has also newly launched a 5-inch IPS RGB screen, which can be directly compatible with the SmartZynqSL motherboard\u003cimg src=\"https:\/\/ae01.alicdn.com\/kf\/Sd0ce3b06a44741c6960461917ca59405f.jpg\" slate-data-type=\"image\"\u003e\u003c\/p\u003e\u003c\/div\u003e\u003c\/div\u003e\n\u003c\/div\u003e\u003c\/div\u003e\u003cp\u003e\u003cbr\u003e\u003c\/p\u003e","brand":"Yoeruyo","offers":[{"title":"Development Board","offer_id":55153099538731,"sku":"14:1202#Development Board","price":463.73,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1000\/5744\/8747\/files\/Se79d7aa3ed2744f19b97654c02d845143.webp?v=1788159294","url":"https:\/\/yoeruyo.com\/products\/zynq-7020-minimum-system-fpga-xilinx-smart-zynq-sl-original-xc7z020-clg484-development-board","provider":"Yoeruyo","version":"1.0","type":"link"}